Today, (Aug. 19, 2 013)I have two items on memristors. First, Dexter Johnson provides some context for understanding why a University of California Riverside research team’s approach to creating memristors is exciting some interest in his Aug. 17, 2013 posting (Nanoclast blog on the IEEE [Institute of Electrical and Electronics Engineers] website), Note: Links have been removed,
The heralding of the memristor, or resistive memory, and the long-anticipated demise of flash memory have both been tracking on opposite trajectories with resistive memory expected to displace flash ever since the memristor was first discovered by Stanley Williams’ group at Hewlett Packard in 2008.
The memristor has been on a rapid development track ever since and has been promised to be commercially available as early as 2014, enabling 10 times greater embedded memory for mobile devices than currently available.
The obsolescence of flash memory at the hands of the latest nanotechnology has been predicted for longer than the commercial introduction of the memristor. But just at the moment it appears it’s going to reach its limits in storage capacity along comes a new way to push its capabilities to new heights, sometimes thanks to a nanomaterial like graphene.
In addition to the graphene promise, Dexter goes on to discuss another development, which could push memory capabilities and which is mentioned in an Aug. 14, 2013 news item on ScienceDaily (and elsewhere),
A team at the University of California, Riverside Bourns College of Engineering has developed a novel way to build what many see as the next generation memory storage devices for portable electronic devices including smart phones, tablets, laptops and digital cameras.
The device is based on the principles of resistive memory [memristor], which can be used to create memory cells that are smaller, operate at a higher speed and offer more storage capacity than flash memory cells, the current industry standard. Terabytes, not gigbytes, will be the norm with resistive memory.
The key advancement in the UC Riverside research is the creation of a zinc oxide nano-island on silicon. It eliminates the need for a second element called a selector device, which is often a diode.
The Aug. 13, 2013 University of California Riverside news release by Sean Nealon, which originated the news item, further describes the limitations of flash memory and reinforces the importance of being able to eliminate a component (selector device),
Flash memory has been the standard in the electronics industry for decades. But, as flash continues to get smaller and users want higher storage capacity, it appears to reaching the end of its lifespan, Liu [Jianlin Liu, a professor of electrical engineering] said.
With that in mind, resistive memory is receiving significant attention from academia and the electronics industry because it has a simple structure, high-density integration, fast operation and long endurance.
Researchers have also found that resistive memory can be scaled down in the sub 10-nanometer scale. (A nanometer is one-billionth of a meter.) Current flash memory devices are roughly using a feature size twice as large.
Resistive memory usually has a metal-oxide-metal structure in connection with a selector device. The UC Riverside team has demonstrated a novel alternative way by forming self-assembled zinc oxide nano-islands on silicon. Using a conductive atomic force microscope, the researchers observed three operation modes from the same device structure, essentially eliminating the need for a separate selector device.
Here’s a link to and a citation for the researchers’ published paper,
Multimode Resistive Switching in Single ZnO Nanoisland System by Jing Qi, Mario Olmedo, Jian-Guo Zheng, & Jianlin Liu. Scientific Reports 3, Article number: 2405 doi:10.1038/srep02405 Published 12 August 2013
This study is open access.
Meanwhile, Boise State University (Idaho, US) is celebrating a new project, CIF: Small: Realizing Chip-scale Bio-inspired Spiking Neural Networks with Monolithically Integrated Nano-scale Memristors, which was announced in an Aug. 17, 2013 news item on Azonano,
Electrical and computer engineering faculty Elisa Barney Smith, Kris Campbell and Vishal Saxena are joining forces on a project titled “CIF: Small: Realizing Chip-scale Bio-inspired Spiking Neural Networks with Monolithically Integrated Nano-scale Memristors.”
Team members are experts in machine learning (artificial intelligence), integrated circuit design and memristor devices. Funded by a three-year, $500,000 National Science Foundation grant, they have taken on the challenge of developing a new kind of computing architecture that works more like a brain than a traditional digital computer.
“By mimicking the brain’s billions of interconnections and pattern recognition capabilities, we may ultimately introduce a new paradigm in speed and power, and potentially enable systems that include the ability to learn, adapt and respond to their environment,” said Barney Smith, who is the principal investigator on the grant.
The Aug. 14, 2013 Boise State University news release by Kathleen Tuck, which originated the news item, describes the team’s focus on mimicking the brain’s capabilities ,
One of the first memristors was built in Campbell’s Boise State lab, which has the distinction of being one of only five or six labs worldwide that are up to the task.
The team’s research builds on recent work from scientists who have derived mathematical algorithms to explain the electrical interaction between brain synapses and neurons.
“By employing these models in combination with a new device technology that exhibits similar electrical response to the neural synapses, we will design entirely new computing chips that mimic how the brain processes information,” said Barney Smith.
Even better, these new chips will consume power at an order of magnitude lower than current computing processors, despite the fact that they match existing chips in physical dimensions. This will open the door for ultra low-power electronics intended for applications with scarce energy resources, such as in space, environmental sensors or biomedical implants.
Once the team has successfully built an artificial neural network, they will look to engage neurobiologists in parallel to what they are doing now. A proposal for that could be written in the coming year.
Barney Smith said they hope to send the first of the new neuron chips out for fabrication within weeks.
With the possibility that HP Labs will make its ‘memristor chips‘ commercially available in 2014 and neuron chips fabricated for the Boise State University researchers within weeks of this Aug. 19, 2013 date, it seems that memristors have been developed at a lightning fast pace. It’s been a fascinating process to observe.
“Resistance switching” memory (RRAM or ReRAM) is not “memristor”!
What is called “resistance switching” is a sort of phenomena. Under certain conditions, “resistance switching” behavior can be brought about in various metal/insulator/metal structures after a soft-breakdown of the insulating material has occurred. Such effects could offer the potential for nonvolatile memory applications (ReRAM or RRAM). “Resistance switching” phenomena are well known since decades /1/ and are in no way related to the concept of “memristor/memristive” systems. Nevertheless, there is ongoing research because there are still a lot of questions with respect to the underlying physical mechanisms. Understanding into the probabilistic nature of the “resistance switching” operation is, for example, crucial to get grip on reliability issues of ReRAM devices.
What is called “memristor” is a hypothetical concept. “Memristors” are conceptually defined by a unique set of characteristic mathematical state equations – based on the mathematical framework proposed by L. Chua /2/. Thus, solid state memory devices should only be labeled “memristors” if one is able to propose a reasonable physical model that satisfies these state equations. Any scientific evidence that “memristors” might exist in physical reality is missing so far. HP’s fabled “memristor” model which was presented in 2008 in the NATURE paper “The missing memristor found” /3/ is, e.g., based on severe electrochemical misconceptions: One cannot derive the characteristic dynamic state equations of a “memristor” on base of HP’s dopant drift model, i.e., no memory devices can operate in accordance with the model because the model is by itself in conflict with fundamentals of electrochemistry /4/. Thus, up to now nobody has invented or found a memory device which operates like a genuine nonvolatile “memristor”.
Moreover, the nonvolatile “memristor” concept raises some severe questions when viewed from the perspective of non-equilibrium thermodynamics /4, 5/. Nonvolatile information storage requires the existence of energy barriers that separate distinct memory states from each other. “Memristors” whose resistance (memory) states depend only on the current (like the HP memristor) or voltage history would thus be unable to protect their memory states against unavoidable electric noise.
Because of thermal fluctuations, electric noise is always present in every electronic device at finite temperatures. A memory device which would operate like a “memristor” of the above mentioned sort would therefore permanently suffer from a creeping loss of information /5, 6/: The proposed hypothetical concept provides no physical mechanism as to how such systems are able to retain their memory states after the applied current or voltage stress has been switched off. It is therefore pointless to tinker with the concept in order to describe physical phenomena like “resistance switching” effects. One cannot find any physical equivalent for the hypothetical mathematical state equations postulated for “memristors” whose resistance states depend only on the current or voltage history.
It can be assumed that most of the former “memristor” enthusiasts are now aware that they have been taken in by an erroneous publication. The stochastic nature of the complex “resistance switching” effects which are observed on various metal/insulator/metal structures sometimes involves current-voltage characteristics which might remind of the pinched hysteresis loops that are thought to be the fingerprints of genuine “memristors”. Such observations, however, are not sufficient to claim that a “memristor” has been found, i.e., curve fitting on base of polynomials with arbitrary degrees is no substitute for a thorough physical understanding.
One should thus be careful with “memristor” claims in case one is not able to present a valid physical model that satisfies the “memristor” state equations according to Chua’s original mathematical framework. Otherwise, there could be serious grounds for believing that the catchy label “memristor” is merely used to get some attention.
/1/ see, e.g.: N. Klein, “Switching and Breakdown in Films”, Thin Solid Films, 7 (1971) ( http://www.sciencedirect.com/science/article/pii/0040609071900678 )
/2/ L. Chua, “Resistance switching memories are memristors”, Appl. Phys. A, 102 (2011) ( http://link.springer.com/article/10.1007/s00339-011-6264-9# )
/3/ D. B. Strukov, G. S. Snider, D. R. Stewart and R. S. Williams, “The missing memristor found”, Nature, 453 (2008) ( http://www.nature.com/nature/journal/v453/n7191/full/nature06932.html )
/4/ P. Meuffels and R. Soni, “Fundamental Issues and Problems in the Realization of Memristors”, (2012) ( http://arxiv.org/abs/1207.7319 )
/5/ M. Di Ventra and Y. V. Pershin, “On the physical properties of memristive, memcapacitive, and meminductive systems”, Nanotechnology, vol. 24, (2013) ( http://iopscience.iop.org/0957-4484/24/25/255201 )
/6/ V. A. Slipko, Y. V. Pershin and M. Di Ventra, “Changing the state of a memristive system with white noise”, Phys. Rev. E 87 (2013) ( http://pre.aps.org/abstract/PRE/v87/i4/e042103 )
Dear Dr. Meuffels, I am sorely aware of my limitations when providing information on this topic and ma thankful to you for taking the time to time to clarify the difference between ‘resistive switching’ and memristors and for providing links for further reading. I look forward to hearing more from you either here on the blog or when you next publish a paper on the topic of memristors. Best regards, Maryse